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 <h1>SIMULATION - 3</h1>
 <h2 style="max-width: 45%;"> Example of a complex system simulation with NGSPICE</h2>
 <h3 style="text-align:left; max-width: 58%;margin-left:0;">
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   <li> 8KW (16KB) Synchronous ROM Macro cell, 16 I/O, 1KB data fully programmed in array.</li>
   <li> 14287 MOS transistors, 16 sense amplifiers, row / column decoders, timing circuits, 5.3ns access time.</li>
   <li> 16 read accesses simulated in 12 minutes with ngspice.</li>
   <li> ldq[15:0] data output matches expected data from ROM array.</li>
  </ul>
  <img src="tutorial_xschem_slides14.png" style="max-width: 68%;">
 </h3>
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